1. Field of the Invention
The present invention relates to a semiconductor device, and more particularly, to a semiconductor device including an epitaxial source/drain structure.
2. Description of the Prior Art
Epitaxial structures are prevalently used in a wide variety of semiconductor applications. For example, the prior art usually forms an epitaxial layer such as a silicon germanium (hereinafter abbreviated as SiGe) layer in a single crystal substrate by performing a selective epitaxial growth (hereinafter abbreviated as SEG) method. Since the epitaxial layer has the crystalline orientation almost identical to the crystalline orientation of the substrate, the epitaxial layers serves as a raised source/drain or a recessed source/drain for the semiconductor device. The epitaxial layers are also practicable in fin field effect transistor (FinFET). Because the lattice constant of the epitaxial SiGe layer is larger than that of the silicon substrate, a strain stress is generated to the channel region of the metal-oxide semiconductor (hereinafter abbreviated as MOS) transistor device. Accordingly, carrier mobility in the channel region is improved and the speed of the MOS transistor device is increased.
Although the epitaxial structures efficiently improve device performance, it increases complexity of the semiconductor fabrication and extra concerns. For example, resistance between the epitaxial structure and the contact plugs, and resistance between the epitaxial structure and the substrate have become issue in the semiconductor device with epitaxial structures.